Vivante TLM IP Models on Synopsys TLMCentral

Source: Synopsys and Design & Reuse (TLM Central)

Design & Reuse to Host TLMCentral Web Portal


  • Integration of the TLMCentral model catalog into the Design & Reuse web portal gives designers a centralized, online resource for available transaction-level models
  • Design & Reuse now provides a one-stop-shop for IP companies, service providers and universities to promote their IP as well as transaction-level models (TLMs)
  • TLMs, used predominately in virtual prototypes, help engineers accelerate their software design schedules by up to 12 months and significantly speeds software development, hardware/software integration and system validation

Today’s complex SoCs require a robust hardware/software modeling methodology that optimizes a design for its target application. As part of our GPU, GPGPU, and Composition Processing Core (CPC) offerings, we provide models of our graphic subsystem IP that can be combined with models of other IP to create virtual prototypes of the customer’s SoC. Using virtual models early helps software teams get a head start on software development and enables faster bring-up on real silicon,” said Wei-Jin Dai, President and CEO of Vivante. “The transition of the TLMCentral web portal to Design & Reuse will provide a great platform for engineers searching for transaction-level third party models for use in their virtual prototyping systems.”                                                                                                                                                                                                                                                                                              — Wei-Jin Dai, CEO Vivante —

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